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author | bunnei <bunneidev@gmail.com> | 2015-01-06 18:42:10 +0100 |
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committer | bunnei <bunneidev@gmail.com> | 2015-01-06 18:42:10 +0100 |
commit | 89bb0ecbd534527898a836e8565702364906cdb9 (patch) | |
tree | 47dd582f543e140b356be9df4813f644f4f29740 /src/core/arm/skyeye_common/armdefs.h | |
parent | Merge pull request #419 from linkmauve/no-x86-specifics (diff) | |
parent | Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX. (diff) | |
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Diffstat (limited to 'src/core/arm/skyeye_common/armdefs.h')
-rw-r--r-- | src/core/arm/skyeye_common/armdefs.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 3100d7adc..1b2cef451 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -165,20 +165,20 @@ struct ARMul_State unsigned ErrorCode; /* type of illegal instruction */ /* Order of the following register should not be modified */ - ARMword Reg[16]; /* the current register file */ - ARMword Cpsr; /* the current psr */ + ARMword Reg[16]; /* the current register file */ + ARMword Cpsr; /* the current psr */ ARMword Spsr_copy; ARMword phys_pc; ARMword Reg_usr[2]; - ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ - ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ - ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ - ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ - ARMword Reg_firq[7]; /* R8---R14 FIRQ */ - ARMword Spsr[7]; /* the exception psr's */ - ARMword Mode; /* the current mode */ - ARMword Bank; /* the current register bank */ - ARMword exclusive_tag; + ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ + ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ + ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ + ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ + ARMword Reg_firq[7]; /* R8---R14 FIRQ */ + ARMword Spsr[7]; /* the exception psr's */ + ARMword Mode; /* the current mode */ + ARMword Bank; /* the current register bank */ + ARMword exclusive_tag; /* the address for which the local monitor is in exclusive access mode */ ARMword exclusive_state; ARMword exclusive_result; ARMword CP15[VFP_BASE - CP15_BASE]; |