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author | Liam <byteslice@airmail.cc> | 2023-12-05 04:19:11 +0100 |
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committer | Liam <byteslice@airmail.cc> | 2023-12-05 04:19:11 +0100 |
commit | f0ee3e29cb6fa5c5d45f5ecd78091295add72baa (patch) | |
tree | 7943c622b7171a813df5efcf309498cc4730e20f /src/core | |
parent | core: refactor emulated cpu core activation (diff) | |
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Diffstat (limited to 'src/core')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index cf52c0505..f34865e26 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -400,9 +400,8 @@ void ArmDynarmic32::GetContext(Kernel::Svc::ThreadContext& ctx) const { ctx.pc = gpr[15]; ctx.pstate = j.Cpsr(); - for (size_t i = 0; i < 32; i++) { - ctx.v[i] = {fpr[i], 0}; - } + static_assert(sizeof(fpr) <= sizeof(ctx.v)); + std::memcpy(ctx.v.data(), &fpr, sizeof(fpr)); auto [fpsr, fpcr] = FpscrToFpsrFpcr(j.Fpscr()); ctx.fpcr = fpcr; @@ -421,9 +420,8 @@ void ArmDynarmic32::SetContext(const Kernel::Svc::ThreadContext& ctx) { j.SetCpsr(ctx.pstate); - for (size_t i = 0; i < 32; i++) { - fpr[i] = static_cast<u32>(ctx.v[i][0]); - } + static_assert(sizeof(fpr) <= sizeof(ctx.v)); + std::memcpy(&fpr, ctx.v.data(), sizeof(fpr)); j.SetFpscr(FpsrFpcrToFpscr(ctx.fpsr, ctx.fpcr)); m_cp15->uprw = static_cast<u32>(ctx.tpidr); |