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author | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-03-28 05:01:28 +0200 |
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committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:25 +0200 |
commit | dbc1e5cde79b9165605741e1ea7158513ef6499f (patch) | |
tree | ba55cdcda905c716ac1bde0463103b425b20bed6 /src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |
parent | vk_pipeline_cache: Fix size hashing of shaders (diff) | |
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Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
-rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index a9c5e9cca..37fc7c7a2 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp @@ -163,6 +163,14 @@ Id EmitUMax32(EmitContext& ctx, Id a, Id b) { return ctx.OpUMax(ctx.U32[1], a, b); } +Id EmitSClamp32(EmitContext& ctx, Id value, Id min, Id max) { + return ctx.OpSClamp(ctx.U32[1], value, min, max); +} + +Id EmitUClamp32(EmitContext& ctx, Id value, Id min, Id max) { + return ctx.OpUClamp(ctx.U32[1], value, min, max); +} + Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) { return ctx.OpSLessThan(ctx.U1, lhs, rhs); } |