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authorbunnei <bunneidev@gmail.com>2018-06-12 20:19:25 +0200
committerGitHub <noreply@github.com>2018-06-12 20:19:25 +0200
commit2015a1b1804d56283a95753b10023d3fa277a854 (patch)
tree0a82eb76ecce76d3b501a827033a0d283cbbbac7 /src/video_core
parentMerge pull request #557 from shinyquagsire23/libnx-hid-fix (diff)
parentGPU: Implemented the iadd32i shader instruction. (diff)
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Diffstat (limited to 'src/video_core')
-rw-r--r--src/video_core/engines/shader_bytecode.h12
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp21
2 files changed, 31 insertions, 2 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index c158ffed2..29d88192e 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -216,7 +216,7 @@ union Instruction {
union {
BitField<20, 19, u64> imm20_19;
- BitField<20, 32, u64> imm20_32;
+ BitField<20, 32, s64> imm20_32;
BitField<45, 1, u64> negate_b;
BitField<46, 1, u64> abs_a;
BitField<48, 1, u64> negate_a;
@@ -246,7 +246,7 @@ union Instruction {
float GetImm20_32() const {
float result{};
- u32 imm{static_cast<u32>(imm20_32)};
+ s32 imm{static_cast<s32>(imm20_32)};
std::memcpy(&result, &imm, sizeof(imm));
return result;
}
@@ -270,6 +270,11 @@ union Instruction {
} alu_integer;
union {
+ BitField<54, 1, u64> saturate;
+ BitField<56, 1, u64> negate_a;
+ } iadd32i;
+
+ union {
BitField<20, 8, u64> shift_position;
BitField<28, 8, u64> shift_length;
BitField<48, 1, u64> negate_b;
@@ -450,6 +455,7 @@ public:
IADD_C,
IADD_R,
IADD_IMM,
+ IADD32I,
ISCADD_C, // Scale and Add
ISCADD_R,
ISCADD_IMM,
@@ -509,6 +515,7 @@ public:
Trivial,
Arithmetic,
ArithmeticInteger,
+ ArithmeticIntegerImmediate,
Bfe,
Logic,
Shift,
@@ -641,6 +648,7 @@ private:
INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"),
INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"),
INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"),
+ INST("0001110---------", Id::IADD32I, Type::ArithmeticIntegerImmediate, "IADD32I"),
INST("0100110000011---", Id::ISCADD_C, Type::ArithmeticInteger, "ISCADD_C"),
INST("0101110000011---", Id::ISCADD_R, Type::ArithmeticInteger, "ISCADD_R"),
INST("0011100-00011---", Id::ISCADD_IMM, Type::ArithmeticInteger, "ISCADD_IMM"),
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index b94b79384..7ce150fda 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -1003,6 +1003,27 @@ private:
break;
}
+ case OpCode::Type::ArithmeticIntegerImmediate: {
+ std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
+
+ if (instr.iadd32i.negate_a)
+ op_a = '-' + op_a;
+
+ std::string op_b = '(' + std::to_string(instr.alu.imm20_32.Value()) + ')';
+
+ switch (opcode->GetId()) {
+ case OpCode::Id::IADD32I:
+ regs.SetRegisterToInteger(instr.gpr0, true, 0, op_a + " + " + op_b, 1, 1,
+ instr.iadd32i.saturate != 0);
+ break;
+ default: {
+ NGLOG_CRITICAL(HW_GPU, "Unhandled ArithmeticIntegerImmediate instruction: {}",
+ opcode->GetName());
+ UNREACHABLE();
+ }
+ }
+ break;
+ }
case OpCode::Type::ArithmeticInteger: {
std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);