summaryrefslogtreecommitdiffstats
path: root/src/video_core
diff options
context:
space:
mode:
authorbunnei <bunneidev@gmail.com>2018-04-24 22:13:51 +0200
committerGitHub <noreply@github.com>2018-04-24 22:13:51 +0200
commite8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e (patch)
tree623190cb7c56224d3cb50fdfeb9f24d82f36c71c /src/video_core
parentMerge pull request #392 from lioncash/log (diff)
parentGPU: Added asserts to our code for handling the QUERY_GET GPU command. (diff)
downloadyuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.tar
yuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.tar.gz
yuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.tar.bz2
yuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.tar.lz
yuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.tar.xz
yuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.tar.zst
yuzu-e8c2bb24b2d839f3b97cd3a17855fd0d1ad8f72e.zip
Diffstat (limited to 'src/video_core')
-rw-r--r--src/video_core/engines/maxwell_3d.cpp27
-rw-r--r--src/video_core/engines/maxwell_3d.h28
2 files changed, 53 insertions, 2 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 2a3ff234a..35773a695 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -147,11 +147,36 @@ void Maxwell3D::ProcessQueryGet() {
// VAddr before writing.
VAddr address = memory_manager.PhysicalToVirtualAddress(sequence_address);
+ // TODO(Subv): Support the other query units.
+ ASSERT_MSG(regs.query.query_get.unit == Regs::QueryUnit::Crop,
+ "Units other than CROP are unimplemented");
+ ASSERT_MSG(regs.query.query_get.short_query,
+ "Writing the entire query result structure is unimplemented");
+
+ u32 value = Memory::Read32(address);
+ u32 result = 0;
+
+ // TODO(Subv): Support the other query variables
+ switch (regs.query.query_get.select) {
+ case Regs::QuerySelect::Zero:
+ result = 0;
+ break;
+ default:
+ UNIMPLEMENTED_MSG("Unimplemented query select type %u",
+ static_cast<u32>(regs.query.query_get.select.Value()));
+ }
+
+ // TODO(Subv): Research and implement how query sync conditions work.
+
switch (regs.query.query_get.mode) {
- case Regs::QueryMode::Write: {
+ case Regs::QueryMode::Write:
+ case Regs::QueryMode::Write2: {
// Write the current query sequence to the sequence address.
u32 sequence = regs.query.query_sequence;
Memory::Write32(address, sequence);
+
+ // TODO(Subv): Write the proper query response structure to the address when not using short
+ // mode.
break;
}
default:
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 609504795..a022665eb 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -46,6 +46,29 @@ public:
enum class QueryMode : u32 {
Write = 0,
Sync = 1,
+ // TODO(Subv): It is currently unknown what the difference between method 2 and method 0
+ // is.
+ Write2 = 2,
+ };
+
+ enum class QueryUnit : u32 {
+ VFetch = 1,
+ VP = 2,
+ Rast = 4,
+ StrmOut = 5,
+ GP = 6,
+ ZCull = 7,
+ Prop = 10,
+ Crop = 15,
+ };
+
+ enum class QuerySelect : u32 {
+ Zero = 0,
+ };
+
+ enum class QuerySyncCondition : u32 {
+ NotEqual = 0,
+ GreaterThan = 1,
};
enum class ShaderProgram : u32 {
@@ -476,7 +499,10 @@ public:
u32 raw;
BitField<0, 2, QueryMode> mode;
BitField<4, 1, u32> fence;
- BitField<12, 4, u32> unit;
+ BitField<12, 4, QueryUnit> unit;
+ BitField<16, 1, QuerySyncCondition> sync_cond;
+ BitField<23, 5, QuerySelect> select;
+ BitField<28, 1, u32> short_query;
} query_get;
GPUVAddr QueryAddress() const {