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authorSubv <subv2112@gmail.com>2018-04-24 03:12:40 +0200
committerSubv <subv2112@gmail.com>2018-04-25 18:55:29 +0200
commitb1109931b9a92ce89635cb7c0c0c1c0c7e6866ed (patch)
tree8dc60c3b4fedc1300c0a66079df11197b4e366fa /src
parentGPU: Reduce the number of registers of Maxwell3D to 0xE00. (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/fermi_2d.cpp7
-rw-r--r--src/video_core/engines/fermi_2d.h28
-rw-r--r--src/video_core/gpu.cpp2
3 files changed, 34 insertions, 3 deletions
diff --git a/src/video_core/engines/fermi_2d.cpp b/src/video_core/engines/fermi_2d.cpp
index 7aab163dc..87634da21 100644
--- a/src/video_core/engines/fermi_2d.cpp
+++ b/src/video_core/engines/fermi_2d.cpp
@@ -7,7 +7,12 @@
namespace Tegra {
namespace Engines {
-void Fermi2D::WriteReg(u32 method, u32 value) {}
+Fermi2D::Fermi2D(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
+
+void Fermi2D::WriteReg(u32 method, u32 value) {
+ ASSERT_MSG(method < Regs::NUM_REGS,
+ "Invalid Fermi2D register, increase the size of the Regs structure");
+}
} // namespace Engines
} // namespace Tegra
diff --git a/src/video_core/engines/fermi_2d.h b/src/video_core/engines/fermi_2d.h
index 8967ddede..a97f5bb28 100644
--- a/src/video_core/engines/fermi_2d.h
+++ b/src/video_core/engines/fermi_2d.h
@@ -4,19 +4,45 @@
#pragma once
+#include <array>
+#include "common/assert.h"
+#include "common/common_funcs.h"
#include "common/common_types.h"
+#include "video_core/memory_manager.h"
namespace Tegra {
namespace Engines {
+#define FERMI2D_REG_INDEX(field_name) \
+ (offsetof(Tegra::Engines::Fermi2D::Regs, field_name) / sizeof(u32))
+
class Fermi2D final {
public:
- Fermi2D() = default;
+ explicit Fermi2D(MemoryManager& memory_manager);
~Fermi2D() = default;
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
+
+ struct Regs {
+ static constexpr size_t NUM_REGS = 0x258;
+
+ union {
+ struct {
+ INSERT_PADDING_WORDS(0x258);
+ };
+ std::array<u32, NUM_REGS> reg_array;
+ };
+ } regs{};
+
+ MemoryManager& memory_manager;
};
+#define ASSERT_REG_POSITION(field_name, position) \
+ static_assert(offsetof(Fermi2D::Regs, field_name) == position * 4, \
+ "Field " #field_name " has invalid position")
+
+#undef ASSERT_REG_POSITION
+
} // namespace Engines
} // namespace Tegra
diff --git a/src/video_core/gpu.cpp b/src/video_core/gpu.cpp
index 9463cd5d6..351d21711 100644
--- a/src/video_core/gpu.cpp
+++ b/src/video_core/gpu.cpp
@@ -12,7 +12,7 @@ namespace Tegra {
GPU::GPU() {
memory_manager = std::make_unique<MemoryManager>();
maxwell_3d = std::make_unique<Engines::Maxwell3D>(*memory_manager);
- fermi_2d = std::make_unique<Engines::Fermi2D>();
+ fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
}