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authorVolcaEM <63682805+VolcaEM@users.noreply.github.com>2020-07-15 01:22:52 +0200
committerGitHub <noreply@github.com>2020-07-15 01:22:52 +0200
commite90802e762c0a15bd0d7bb7f5df006a4298e1023 (patch)
treed4bf6c5efb0f74c68627df4512c037784c79c8f5 /src
parentdmnt_cheat_vm: Implement opcode 0xC3 (ReadWriteStaticRegister) (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/core/memory/dmnt_cheat_vm.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/core/memory/dmnt_cheat_vm.cpp b/src/core/memory/dmnt_cheat_vm.cpp
index 0faebe951..2e7da23fe 100644
--- a/src/core/memory/dmnt_cheat_vm.cpp
+++ b/src/core/memory/dmnt_cheat_vm.cpp
@@ -1173,7 +1173,8 @@ void DmntCheatVm::Execute(const CheatProcessMetadata& metadata) {
}
}
}
- } else if (auto rw_static_reg = std::get_if<ReadWriteStaticRegisterOpcode>(&cur_opcode.opcode)) {
+ } else if (auto rw_static_reg =
+ std::get_if<ReadWriteStaticRegisterOpcode>(&cur_opcode.opcode)) {
if (rw_static_reg->static_idx < NumReadableStaticRegisters) {
// Load a register with a static register.
registers[rw_static_reg->idx] = static_registers[rw_static_reg->static_idx];