blob: 531875006eec5e41501b60ebf2606612ff9ae440 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
|
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <array>
#include "common/common_types.h"
#include "core/hle/kernel/vm_manager.h"
/// Generic ARM11 CPU interface
class ARM_Interface : NonCopyable {
public:
virtual ~ARM_Interface() {}
struct ThreadContext {
std::array<u64, 31> cpu_registers;
u64 sp;
u64 pc;
u64 cpsr;
std::array<u128, 32> fpu_registers;
u64 fpscr;
// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
VAddr tls_address;
};
/**
* Runs the CPU for the given number of instructions
* @param num_instructions Number of instructions to run
*/
void Run(int num_instructions) {
ExecuteInstructions(num_instructions);
this->num_instructions += num_instructions;
}
/// Step CPU by one instruction
void Step() {
Run(1);
}
virtual void MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) {}
/// Clear all instruction cache
virtual void ClearInstructionCache() = 0;
/// Notify CPU emulation that page tables have changed
virtual void PageTableChanged() = 0;
/**
* Set the Program Counter to an address
* @param addr Address to set PC to
*/
virtual void SetPC(u64 addr) = 0;
/*
* Get the current Program Counter
* @return Returns current PC
*/
virtual u64 GetPC() const = 0;
/**
* Get an ARM register
* @param index Register index
* @return Returns the value in the register
*/
virtual u64 GetReg(int index) const = 0;
/**
* Set an ARM register
* @param index Register index
* @param value Value to set register to
*/
virtual void SetReg(int index, u64 value) = 0;
virtual u128 GetExtReg(int index) const = 0;
virtual void SetExtReg(int index, u128 value) = 0;
/**
* Gets the value of a VFP register
* @param index Register index (0-31)
* @return Returns the value in the register
*/
virtual u32 GetVFPReg(int index) const = 0;
/**
* Sets a VFP register to the given value
* @param index Register index (0-31)
* @param value Value to set register to
*/
virtual void SetVFPReg(int index, u32 value) = 0;
/**
* Get the current CPSR register
* @return Returns the value of the CPSR register
*/
virtual u32 GetCPSR() const = 0;
/**
* Set the current CPSR register
* @param cpsr Value to set CPSR to
*/
virtual void SetCPSR(u32 cpsr) = 0;
virtual VAddr GetTlsAddress() const = 0;
virtual void SetTlsAddress(VAddr address) = 0;
/**
* Saves the current CPU context
* @param ctx Thread context to save
*/
virtual void SaveContext(ThreadContext& ctx) = 0;
/**
* Loads a CPU context
* @param ctx Thread context to load
*/
virtual void LoadContext(const ThreadContext& ctx) = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0;
/// Getter for num_instructions
u64 GetNumInstructions() const {
return num_instructions;
}
protected:
/**
* Executes the given number of instructions
* @param num_instructions Number of instructions to executes
*/
virtual void ExecuteInstructions(int num_instructions) = 0;
private:
u64 num_instructions = 0; ///< Number of instructions executed
};
|